#define SCK_PIN   13
#define MISO_PIN  12
#define MOSI_PIN  11

//command bytes
#define RESET 0b11000000
#define READ 0b00000011
#define WRITE 0b00000010
#define BIT_MODIFY 0b00000101
#define RTS_TX0 0b10000001
#define RTS_TX1 0b10000010
#define RTS_TX2 0b10000100
//register addresses
#define CNF3 0x28   
#define TX0_CTRL_ADR 0x30
#define TX1_CTRL_ADR 0x40
#define TX2_CTRL_ADR 0x50
#define CANCTRL 0x0F  //actually it's any address ending in F will work
#define CANSTAT 0x0E //any address ending in E
#define TXB0CTRL 0x30
#define TXB1CTRL 0x40
#define TXB2CTRL 0x50
#define TXB0SIDH 0x31
#define TXB1SIDH 0x41
#define TXB2SIDH 0x51
#define TXB0DLC  0x35
#define TXB1DLC  0x45
#define TXB2DLC  0x55
#define TXRTSCTRL 0x0D
#define RXB0CTRL 0x60
#define RXB1CTRL 0x70
#define BFPCTRL 0x0C
#define RXB0SIDH 0x61
#define RXB1SIDH 0x71
#define RXM0SIDH 0x20
#define RXM1SIDH 0x21
#define RXB0DLC 0x65
#define RXB1DLC 0x75
#define RXB0DM 0x66
#define RXB1DM 0x76
#define CANINTF 0x2C
#define CANINTE 0x2B

//magic values for certain registers
#define CNF3_VAL 0x05  //sets PS2 = 6
#define CNF2_VAL 0xB8 //PS1 = 7, PropSeg = 2, enablePS2 length set, single sample
#define CNF1_VAL 0x03  // SJW = 4, BRP = 4

#define LOAD_TX_BUFFER //0b01000abc

